A Hardware-Efficient VLSI Architecture for High-Resolution DOA Estimation in Smart Antenna Systems
DOI:
https://doi.org/10.22178/acta.26.3.29Keywords:
Direction-of-Arrival (DOA) Estimation, Smart Antennas, MUSIC Algorithm, Hardware-Efficient Algorithms, Low-Power VLSI, Root-MUSIC, Modified MUSIC, ESPRIT, ECA-MURE, FPGA/ASIC ImplementationAbstract
High-resolution Direction-of-Arrival (DOA) estimation is a critical task in modern smart antenna and wireless communication systems. Traditional MUSIC-based algorithms, including Root-MUSIC, Modified MUSIC, ESPRIT, and ECA-MURE, provide accurate DOA estimation but suffer from high computational complexity and increased hardware resource requirements, which limits their real-time implementation on low-power VLSI platforms. In this paper, we propose a Hardware-Efficient Improved MUSIC (HE-IMUSIC) algorithm, which enhances the conventional MUSIC approach by reducing the number of covariance matrix operations, optimizing the noise subspace estimation, and employing a fixed-point-friendly formulation suitable for VLSI implementation. The proposed method maintains high resolution and robustness under low signal-to-noise ratio (SNR) and closely spaced sources while significantly reducing computational overhead. Simulation results demonstrate that HE-IMUSIC outperforms Root-MUSIC, Modified MUSIC, ESPRIT, and ECA-MURE in terms of accuracy, peak resolution, and convergence speed. Furthermore, a hardware-oriented analysis highlights the algorithm’s suitability for low-power FPGA/ASIC realization, offering a practical trade-off between performance and resource efficiency. This makes the proposed approach highly suitable for real-time DOA estimation in next-generation smart antenna systems and embedded wireless platforms.



